International Journal of Applied Science and Engineering
Published by Chaoyang University of Technology

Asmita Poojari1*, Nagesh H R2

1 Department of Computer Science and Engineering, NMAMIT Nitte Karkala, Karnataka
2 Head of the Department, Department of Information Science and Engineering, A J Institute of Engineering and Technology Kottara, Mangalore


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The IoT (Internet of Things) is a network of devices that are interconnected and are uniquely addressable, based on common communication protocols and links to perform certain tasks. The recent developments in the wireless communications have increased the need for the IoT-connected devices. The sensors and the sensor nodes used in these networks are low-resource devices, thus increasing the vulnerability and hence becoming a possible target for hackers. The development and deployment of lightweight protection schemes for such low resource devices have also increased. The random number generation or the key generation used in the encryption process is the most important element in protecting these resource-constrained devices, as the security of the entire data depends on the key used. In this paper a novel random number generation using LFSR (Linear Feedback Shift Register) and Scrambling Algorithm for lightweight encryption algorithms is proposed using which the keys for the encryption process can be generated, thus improving the security of data transmitted in the IoT environment. The randomness of the numbers generated by this Random number generator algorithm is tested using pertinent set of statistical tests. These statistical tests analyze the cryptographic properties of the sub keys generated by the key scheduling algorithm, such as confusion, diffusion, independence, and randomness. For the purpose of simulation, the code is written in Verilog and simulated using Xilinx Vivado and the implementation is carried out using Artix-7 FPGA family for analyzing the parameters like Area, power and timing.

Keywords: Internet of things, FPGA, LFSR, Lightweight cryptography, NIST.

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  1. Afzal, S., Waqas, U., Mubeen, M.A., Yousaf, M. 2015. Statistical analysis of key schedule algorithms of different block ciphers, Science International, 27.

  2. Amiruddin, A., Ratna, A.A.P., Sari, R. 2019. Construction and analysis of key generation algorithms based on modified Fibonacci and scrambling factors for privacy preservation. International Journal of Network Security, 21, 250–258.

  3. Avanzi, R. 2016. A salad of block ciphers-the state of    the art in block ciphers and their analysis (, 2016).

  4. Bakiri, M., Guyeux, C., Couchot, J.F., Oudjida, A.K. 2018. Survey on hardware implementation of random number generators on FPGA: Theory and experimental analyses. Computer Science Review, Elsevier, 27, 135-153. hal-02182827, 4, 5–13.

  5. Barreto, P., Rijmen, V. 2000. The khazad legacy-level block cipher, Primitive submitted to NESSIE, 97.

  6. Biryukov, A., Nikoli´c, I. 2011. Search for related-key differential characteristics in DES-like ciphers. In Fast Software Encryption, 6733, 18–34.

  7. Blumenthal, U., Bellovin, S.M. 1996. A better key schedule for DES-like ciphers, in Proceedings of the Pragocrypt, Prague, Czech Republic.

  8. Bogdanov, A., Knudsen, L.R., Leander, G., Paar, C., Poschmann, A., Robshaw, M.J.B., Seurin, Y., Vikkelsoe, C. 2007. PRESENT: an ultra-lightweight block cipher, in Cryptographic Hardware and Embedded Systems—CHES 2007, 450–466, Springer, Berlin, Heidelberg.

  9. Choi, P., Lee, M.‐K., Kim, D.K. 2017. Fast compact true random number generator based on multiple sampling. Electronics Letters, 53, 841–843.

  10. Cusick, T.W., Stanica, P. 2017. Chapter 2 - Fourier analysis of Boolean functions, editor(s): Thomas W. Cusick, Pantelimon Stanica, cryptographic Boolean functions and applications (Second Edition), Academic Press, 7–29, ISBN 9780128111291,

  11. Daemen, J. 1995. Cipher and hash function design strategies based on linear and differential cryptanalysis, Ph.D. dissertation, Doctoral Dissertation, KU Leuven.

  12. Daemen, J., Rene, G., Joos, V. 1993. Weak keys for IDEA, Annual International Cryptology Conference, 224–231, Springer, Berlin, Heidelberg.

  13. Guo, J., Peyrin, T., Poschmann, A., Robshaw, M. 2011. The LED block cipher. In CHES 2011, 6917, 326–341.

  14. Gupta, R., Pandey, A., Baghel, R.K. 2019. FPGA implementation of chaos‐based high‐speed true random number generator. International Journal of Numerical Modelling: Electronic Networks, Devices and Fields. 32, e2604.

  15. Harmouch, Y., El Kouch, R. 2019. The benefit of using chaos in key schedule algorithm, Journal of Information Security and Applications, 45, 143–155.

  16. Hong, D., Sung, J., Hong, S., Lim, J., Lee, S., Koo, B.S., Lee, C., Chang, D., Lee, J., Jeong, K., Kim, H., Kim, J., Chee, S. 2006. HIGHT: A new block cipher suitable for low-resource device. In CHES, 4249, 46–59. Springer.

  17. Jaya Sudha, K., Jaya Rani, G., Mirza Shafi Sahahsavar, 2015. Generation of uniform random numbers using look up table as shift register, International Journal of Science, Engineering and Technology Research (IJSETR), 4.

  18. Justin, R., Mathew, B.K., Abe, S. 2016. FPGA implementation of high quality random number generator using LUT based shift registers, Procedia Technology, 24, 1155–1162, ISSN 2212-0173.

  19. Kim, C.H. 2011. Improved differential fault analysis on AES key schedule, IEEE Transactions on Information Forensics and Security, 7, 41–50.

  20. Knudsen, L., Leander, G., Poschmann, A., Matthew, R.J.B. 2010. PRINTcipher: A block cipher for IC-printing. In CHES 2010, 6225, 16–32.

  21. Knudsen, L.R., Mathiassen, J.E. 2004. On the role of key schedules in attacks on iterated ciphers, in European Symposium on Research in Computer Security, 322–334, Springer, Berlin, Heidelberg.

  22. Kumar, V.G.K., Rai, C.S. 2020. FPGA implementation of simple encryption scheme for resource-constrained devices, International Journal of Advanced Trends in Computer Science and Engineering, 9.

  23. Kumar, V.G.K., Rai, C.S. 2021. Efficient implementation of cryptographic arithmetic primitives using reversible logic and Vedic mathematics. Journal of The Institution of Engineers (India): Series B 102, 59–74.

  24. Matsumoto, M., Kurita, Y. 1992. Twisted GFSR generators. ACM Transactions on Modeling and Computer Simulation, 2, 179–194. DOI:

  25. May, L., Henricksen, M., Millan, W., Carter, G., Dawson, E. 2002. Strengthening the key schedule of the AES, in Information Security and Privacy, 226–240, Springer, Berlin Heidelberg.

  26. McKay, K.A., Bassham, L., Turan, M.S., Mouha, N. 2016. DRAFT NISTIR 8114: Report on lightweight cryptography, National Institute of Standards and Technology Internal Report 8114.

  27. Mitchell, R.L., Stone, C.R. 1977. Table-lookup methods for generating arbitrary random numbers, in IEEE Transactions on Computers, C-26, 1006–1008, doi: 10.1109/TC.1977.1674735.

  28. NIST, 2010. A statistical test suite for random and pseudorandom number generators for cryptographic applications.

  29. Paje, R.E.J., Sison, A.M., Medina, R.P. 2019. Multidimensional key RC6 algorithm, in Proceedings of the 3rd International Conference on Cryptography, Security and Privacy—ICCSP’19, 33–38, Kuala Lumpur, Malaysia.

  30. Seok, B., Lee, C. 2019. Fast implementations of ARX-based lightweight block ciphers (SPARX, CHAM) on 32-bit processor. International Journal of Distributed Sensor Networks.

  31. Simion, E. 2015. The relevance of statistical tests in cryptography, IEEE Security & Privacy, 13, 66–70.

  32. Suzaki, T., Minematsu, K., Morioka, S., Kobayashi, E. 2013. TWINE: A lightweight block cipher for multiple platforms. In Selected Areas in Cryptography, 7707, 339–354.

  33. Sys, M., Klinec, D., Kubıcek, K., Svenda, P. 2017. BoolTest: the fast randomness testing strategy based on boolean functions with application to DES, 3-DES, MD5, MD6, and SHA-256, in International Conference on E-Business and Telecommunications, 123–149, Springer, Cham, Switzerland.

  34. Tezuka, S. 1995. Linear congruential generators. In: Uniform Random Numbers. The Springer International Series in Engineering and Computer Science (Discrete Event Dynamic Systems), 315. Springer, Boston, MA.

  35. Thomas, D.B., Luk, W. 2013. The LUT-SR family of uniform random number generators for FPGA architectures, IEEE Transactions on Very Large Scale Integration (VLSI) Systems, 21, 761–770.

  36. Ukrop, M. 2016. Randomness analysis in authenticated encryption systems, Ph.D. thesis, Masarykovauniverzita, Fakultainformatiky, Brno, Czechia.

  37. Usman, M., Ahmed, I., Aslam, M.I., Khan, S., Shah, U.A. 2017. SIT: A lightweight encryption algorithm for secure internet of things, International Journal of Advanced Computer Science and Applications, 8.

  38. Wetzels, J., Bokslag, W. 2015. Simple SIMON: FPGA implementations of the SIMON 64/128 block cipher. Cryptography Engineering Kerckhoffs Institute. 1, 1–20.

  39. Wu, W., Zhang, L. 2011. LBlock: A lightweight block cipher. In Applied Cryptography and Network Security, 6715, 327–344.

  40. Wu, X., Li, S. 2017. A new digital true random number generator based on delay chain feedback loop, IEEE conference 978‐1‐4673‐6853‐7/17/$31.00


Received: 2021-05-06

Accepted: 2021-07-01
Available Online: 2021-12-01

Cite this article:

Poojari, A., Nagesh, H.R. 2021. FPGA implementation of random number generator using LFSR and scrambling algorithm for lightweight cryptography. International Journal of Applied Science and Engineering, 18, 2021114.

  Copyright The Author(s). This is an open access article distributed under the terms of the Creative Commons Attribution License (CC BY 4.0), which permits unrestricted use, distribution, and reproduction in any medium, provided the original author and source are cited.

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