International Journal of Applied Science and Engineering
Published by Chaoyang University of Technology

Ali M. Al-Haj*

Department of Electronics Engineering, Princess Sumaya University for Technology, Al-Jubeiha P.O. Box 1438, Amman 11941, Jordan.


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ABSTRACT


The discrete wavelet transform has gained the reputation of being a very effective signal analysis tool for many practical applications. However, due to its computation-intensive nature, current implementations of the transform fall short of meeting real-time processing requirements of most applications. This paper describes a parallel implementation of the discrete wavelet transform and its inverse using high-density field programmable logic devices (FPGAs). The implementation exploits the lookup table-based architecture of Virtex FPGAs, by reformulating the wavelet computation in accordance with the distributed arithmetic algorithm. Performance results show that the distributed arithmetic formulation results in a considerable performance gain compared with the conventional arithmetic formulation of the wavelet computation. Finally, we show that the FPGA implementation outperforms alternative software implementations of the discrete wavelet transform.



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ARTICLE INFORMATION




Accepted: 2003-07-22
Available Online: 2003-09-01


Cite this article:

Al-Haj, A.-M. 2003. Fast discrete wavelet transformation using FPGAs and distributed arithmetic, International Journal of Applied Science and Engineering, 1, 160–171. https://doi.org/10.6703/IJASE.2003.1(2).160